Nanotechnology

On a silicon substrate

Nonvolatile memory cell, array thereof, fabrication methods thereof and device comprising the same
A nonvolatile memory cell is capable of reducing an excessive current leakage due to a rough surface of a polysilicon and of performing even at a low temperature process by forming the first oxide film including a silicon oxynitride (SiOxNy) layer using nitrous oxide plasma and by forming a plurality of silicon nanocrystals in a nitride film by implanting a silicon nanocrystal on the nitride film by an ion implantation method, and a fabricating method thereof and a memory apparatus including the nonvolatile memory cell.

Nanowire semiconductor device
Semiconductor devices may be fabricated using nanowires. In an example embodiment, a conductive gate may be used to control conduction along the nanowires, in which case one of the contacts is a drain and the other a source. The nanowires may be grown in a trench or through-hole in a substrate or in particular in an epitaxial layer on substrate. In another example embodiment, the gate may be provided only at one end of the nanowires. The nanowires can be of the same material along their length; alternatively different materials can be used, especially different materials adjacent to the gate and between the gate and the base of the trench.

Method for mounting anisotropically-shaped members
A mounting method of the present invention includes the steps of: (I) disposing a first liquid in a first region provided on one principal surface of a substrate; (II) bringing a pillar-like member as an anisotropically-shaped member, disposed on one principal surface of a transfer substrate in a predetermined orientation, into contact with the first liquid disposed in the first region, so as to move the pillar-like member to a region of the first liquid; and (III) removing the first liquid from the substrate.

Semiconductor integrated circuit chip with a nano-structure-surface passivation film
A semiconductor integrated circuit (IC) chip includes an IC chip body and a nano-structure-surface passivation film. The IC chip body has at least one surface. The nano-structure-surface passivation film is formed on the at least one surface. The nano-structure-surface passivation film including nano-particles and a carrier resin protects the IC chip body from encountering any external interference. The IC chip body further has a plurality of fingerprint sensing members for sensing a whole fingerprint or a partial fingerprint.

Memory device having nanocrystals in memory cell
The memory device includes a source region and a drain region in a substrate and spaced apart from each other; a memory cell formed on a surface of the substrate, wherein the memory cell connects the source region and the drain region and includes a plurality of nanocrystals; a control gate formed on the memory cell. The memory cell includes a first tunneling oxide layer formed on the substrate; a second tunneling oxide layer formed on the first tunneling oxide layer; and a control oxide layer formed on the second tunneling oxide layer. The control oxide layer includes the nanocrystals. The second tunneling oxide layer, having an aminosilane group the increases electrostatic attraction, may be hydrophilic, enabling the formation of a monolayer of the nanocrystals.